Driven by the Internet of Things (IoT), the industry has witnessed a surge in demand for battery-powered devices, which has led to an increased emphasis on energy efficiency at the system level. As a result, the term "Ultra Low Power" (ULP) has become a common marketing buzzword, particularly when referring to microcontrollers. To truly understand what ULP means, it's essential to explore its implications and how it is measured and optimized.
In this article, we will analyze two Analog Devices microcontrollers to shed light on the real meaning of ultra-low power consumption. We'll also examine the EEMBC Alliance’s certification process, which ensures the accuracy of performance scores and helps developers select the most suitable microcontroller for their applications.
Measuring and optimizing ultra-low power consumption is crucial for achieving efficient designs. Developers often refer to datasheets to find current values per MHz and sleep mode currents. However, these values can be misleading without context. For instance, some vendors use benchmarks like EEMBC CoreMark, while others rely on simple operations such as "while 1." The presence of wait states on flash memory can affect performance and increase power consumption. Additionally, voltage levels and other conditions vary across manufacturers, making direct comparisons challenging without a standardized approach.
Deep sleep modes are typically well-documented in datasheets, but the conditions under which current consumption is measured can differ significantly between vendors. Moreover, the power required to transition into and out of sleep modes should not be overlooked, as it can have a substantial impact depending on how frequently the device wakes up.
The balance between active and sleep modes is critical for determining ULP performance. EEMBC uses a one-second cycle in its ULPMark-CoreProfile benchmark, where the device wakes up briefly, performs a small task, and returns to sleep. This setup allows for a consistent measurement of power efficiency over time.
Optimizing power usage involves minimizing operating current and effectively utilizing deep sleep modes. Lowering the frequency reduces operating current but increases execution time, which may offset any savings. Understanding the trade-offs between different microcontroller choices, duty cycles, and sleep currents is key to designing low-power systems.
Energy per cycle depends on the duty cycle and can be calculated using a simplified formula that assumes minimal power for switching. The slope of the graph represents the operating current (ION), while the y-intercept reflects the sleep current (ISLEEP). This model highlights the importance of reducing active power consumption, especially when the duty cycle is high.
To illustrate this, we compare the ADuCM4050 and ADuCM302x from Analog Devices. The ADuCM4050 scored 203, while the ADuCM302x scored 245.5 on the ULPMark-CoreProfile. These differences arise from variations in architecture, clock speed, and additional features. The ADuCM4050 operates at 52 MHz, offers more memory, and includes advanced security features, all of which contribute to its higher performance but also higher power consumption during active periods.
The role of the compiler cannot be underestimated. It can optimize code execution, affecting both speed and power consumption. For example, different optimization settings can lead to significant variations in ULPMark results. This underscores the need for transparency and consistency in benchmarking practices.
Converting ULPMark scores to energy values provides a clearer picture of power efficiency. The ULPMark-CoreProfile uses a formula that calculates energy based on cycles and average power measurements. This approach ensures that both active and sleep power are accounted for, offering a comprehensive view of energy consumption.
One limitation of early ULPMark versions was the restriction to a 3V operating voltage. Modern MCUs perform better at lower voltages, and using DC-DC converters can further enhance efficiency. However, integrating these converters requires careful consideration of their impact on overall system design.
Certification mechanisms play a vital role in ensuring the credibility of benchmark results. Vendors submit their devices to the EEMBC Technology Center for testing, where scores are averaged across multiple boards to ensure consistency. This process helps eliminate variability caused by factors like temperature, humidity, and manufacturing differences.
Looking ahead, EEMBC is expanding its benchmark suites to include peripheral profiles and IoT-specific tests, providing a more holistic evaluation of MCU performance. Encouraging vendors to publish certified results will improve the reliability of data sheets and help developers make informed decisions.
Ultimately, understanding ULP requires a nuanced approach that considers both technical specifications and real-world application scenarios. By leveraging standardized benchmarks and transparent reporting, engineers can make better choices for their low-power designs.
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