Applied Materials announced the introduction of an Applied CenturaR Integrated Gate Stack integrated gate stack system to create critical gate dielectric structures in 22-nm logic chips.
In fact, this system is the only machine that can handle the entire high dielectric constant (k-value) multilayer stack in a single vacuum environment, thus maintaining the integrity of the critical thin film interface. For state-of-the-art microprocessors and graphics chips, this feature is extremely important in maximizing transistor speed and minimizing power consumption.
As the logic wafer process goes to 22nm and below, the core of the transistor gate structure, ie its dielectric film stack, becomes thinner and thinner, so atomic engineering must be adopted. To meet this challenge, the integrated gate stack system uses Applied Materials' advanced atomic layer deposition (ALD) technology. This technology can create an ultra-thin layer based on ruthenium that is less than 2 nanometers thick, about one ten-thousandth of the width of human hair. Each layer can achieve excellent uniformity on the entire wafer. .
Applied Materials Group Vice President and general manager of metal deposition, front-end and ALD products division Steve. Steve Ghanayem said that future nano-crystals require extremely high precision, because thin films with only a few atomic thickness will determine the performance of the device. By incorporating multiple connection process steps into our world-class Centura platform, we can simplify our customers' manufacturing processes and help customers improve the yield of next-generation logic chips.
Applied Materials Vice President and General Manager of Semiconductor Systems Business Group Landy. Dr. Randhir Thakur stated that when it comes to the 20nm generation, the complexity of the wafers has also increased dramatically. One of the biggest challenges is at the transistor level, and we have seen a completely refurbished design in important parts of electronic products. . Customers have seen the advantages of Applied Materials' metal gate stacking solutions and have collaborated with us to develop an integrated approach to dielectric gate stacking. The new Centura Integrated Gate Stacking System is one of several innovations that Applied Materials has introduced in recent months to assist customers in converting advanced transistor designs from laboratories to mass production.
Applied Materials showcases Centura's integrated gate stacking technology at Semicon West in San Francisco, USA.
In fact, this system is the only machine that can handle the entire high dielectric constant (k-value) multilayer stack in a single vacuum environment, thus maintaining the integrity of the critical thin film interface. For state-of-the-art microprocessors and graphics chips, this feature is extremely important in maximizing transistor speed and minimizing power consumption.
As the logic wafer process goes to 22nm and below, the core of the transistor gate structure, ie its dielectric film stack, becomes thinner and thinner, so atomic engineering must be adopted. To meet this challenge, the integrated gate stack system uses Applied Materials' advanced atomic layer deposition (ALD) technology. This technology can create an ultra-thin layer based on ruthenium that is less than 2 nanometers thick, about one ten-thousandth of the width of human hair. Each layer can achieve excellent uniformity on the entire wafer. .
Applied Materials Group Vice President and general manager of metal deposition, front-end and ALD products division Steve. Steve Ghanayem said that future nano-crystals require extremely high precision, because thin films with only a few atomic thickness will determine the performance of the device. By incorporating multiple connection process steps into our world-class Centura platform, we can simplify our customers' manufacturing processes and help customers improve the yield of next-generation logic chips.
Applied Materials Vice President and General Manager of Semiconductor Systems Business Group Landy. Dr. Randhir Thakur stated that when it comes to the 20nm generation, the complexity of the wafers has also increased dramatically. One of the biggest challenges is at the transistor level, and we have seen a completely refurbished design in important parts of electronic products. . Customers have seen the advantages of Applied Materials' metal gate stacking solutions and have collaborated with us to develop an integrated approach to dielectric gate stacking. The new Centura Integrated Gate Stacking System is one of several innovations that Applied Materials has introduced in recent months to assist customers in converting advanced transistor designs from laboratories to mass production.
Applied Materials showcases Centura's integrated gate stacking technology at Semicon West in San Francisco, USA.
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