Tip 1. XST Main Reference: XST User Guide (xst.pdf in the ISE installation directory doc)
Tip 2, Auxiliary Reference: WP231 - HDL Coding PracTIces to Accelerate Design Performance
Tip 3, one of the special notes: Please add timing constraints to XST.
Usually we will add timing constraints and pin constraints to the UCF constraint for the project. However, UCF constraints are used for implementations such as MAP, PAR, etc. The synthesis tool XST does not sense the timing requirements of the system. Adding XCF constraints to XST is the key to achieving the highest frequency of implementation results. The reason is obvious: the implementation tool can only lay out the layout based on the integrated netlist, while the synthesis tool can adjust the integrated netlist according to the requirements, making it easier for the implementation tool to meet the timing requirements. Failure to inform the synthesizer of timing targets will result in our performance requirements not being reflected.
The XCF constraint syntax is similar to UCF and is described in detail in the XST User Guide. In fact, the commonly used constraints such as Period and Offest are exactly the same as the UCF syntax, which can be used directly in XCF.
The way to add XCF constraints to your design is Synthesize - XST --> Right click --> Synthesis Constraint File = Specify path
Tip 4, Special Note 2: Look closely at the Warning in the comprehensive report. Remember to review all of the Warnings in the synthesis report and see if they are safe to ignore. The Synthesizer generates an Error that stops the tool from working, but Warning is often ignored by the user. In fact, Waning can prompt a lot of potential logic problems, such as some signal declarations, are used, but not assigned, or the synthesizer found Latch but not the expected result.
Tip 5, one of the commonly used options: keep_hierarchy - keep the hierarchy. Useful when initial design/debug. XST is integrated according to the hierarchy, without breaking the level optimization. All register names are arranged by name. UCF constraints can easily find the objects that need to be constrained. If you choose soft, the level is maintained during synthesis, and when the map is broken, the tool will break the level to optimize, but the name of the instance is retained.
Tip 6. Commonly used options: register_duplicaTIon + max_fanout + equivalent_register_removal + resource_sharing - Allows automatic copying of registers, setting maximum fanout, and disabling resource sharing. Using duplicate registers when TIming is not met usually improves some bottlenecks. Some optimizations that the synthesizer makes to save area can be detrimental to timing, so turning off equivalent_register_removal and resource_sharing may improve timing.
Tip 7, the three commonly used options: Add IO Buffers - automatically insert buffers. When our design is used as a top layer, the tool is usually automatically inserted into the IO buffer; when it is necessary to insert the design as a module into another design, it is necessary to disable the automatic insertion of the IO Buffer.
Tip 8. Commonly used options: Number of Clock Buffers and buffer_type constraints: When the BUFG in the combined result is not as expected, we can solve it in two ways:
- Use the buffer_type constraint to define the Buffer type used for this signal. Specific usage in the XST User Guide
- Manually insert BUFG, and then set the number of BUFGs allowed. Manually inserted will have high priority and BUFG will be occupied first, and the tool will not automatically insert BUFG.
Tip 9, BlackBox: Calling other already integrated netlists requires the use of BlackBox. BlackBox says it is a HDL file with only port descriptions. For more BlackBox TIp please refer to my blog (Note: for RickySu's blog).
Tip 10, XST command line mode: XST supports batch operation using command line mode.
The XST of the command line supports two modes:
Shell mode - type xst under cmd, then type the command one by one in the xst shell environment;
Script mode - Run the script.scr command with xst -ifn script.scr under cmd, or use script command to call the contents of script.scr in the xst shell. Prior to this, you will need to prepare compile_list.prj first. EDK actually uses this method to call XST. See the XST User Guide for a more detailed syntax.
Tip 11. To view the integrated netlist, in addition to XST's own RTL Schematic tool and Technology Schematic tool, you can also use PlanAhead. His display/find ability is more powerful, and he will merge all the integrated netlists first, and will not be able to see the internal conditions because of a modular pre-combination.
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